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Packaging Technology

Changes in Package Shapes of ICs and LSI devices


2010s: Expanding into subsystem integration technology

In addition to high-density integration of information processing / storage functions by conventional electrons, the semiconductor packaging technology has been widely developed to handle communication functions by radio (RF), light (photon), MEMS (Micro Electro Mechanical Systems) sensors, as well as integration of subsystems.

2013:Activated Development of Silicon Photonics (Intel, PETRA, others)

A high-performance, compact and inexpensive optical transceiver, in which an electronic circuit and an optical circuit are integrated on a silicon chip, realizes a wideband data transfer between chips beyond a distance.

2015:TSV Stacked DRAM (Hynix, Micron)

Data transfer between a processor that processes information and a large capacity DRAM that is a work memory has been a bottleneck for improving the performance of computer systems. In order to solve this problem, it has become necessary to connect the large capacity memory and the processor with a wide bus width and short distance by using TSV (Through Silicon Via). Technical development became active from the middle of the 2000s, and TSV stacked memory for high performance computing (HPC) with standards such as HBM (High Bandwidth Memory) and HMC (Hybrid Memory Cube) was put into practical use one by one from 2014 to 15.

2015:Active Development of FOWLP (Fan-Out Wafer Level Package) Technology (Infineon, TSMC, other companies)

High density packaging technology using wafer level rewiring technology. Unlike the conventional wafer level package, it is possible to form a redistribution layer (RDL) beyond the external shape of the IC chip, and thereby to connect / to integrate a plurality of chips with a high wiring density, leading to the ultimate miniaturization.

2015:Inter-chip Wireless Connection Technology TCI (Keio University)

A technology for communicating between stacked chips by electromagnetic induction using a coil formed on a chip. Compared with TSV (Through Silicon Via) lamination using mechanical via formation / connection, there is a possibility of achieving equal or superior performance at lower cost, and it is attracting expectation.